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Welcome to the IBM Formal Verification and Testing Technologies homepage. These pages present information on our tools and their extensive use both internally by IBM and by external licensees.
- RuleBase Parallel Edition
An industrial-strength model checker.
- FoCs
A tool for automatically generating VHDL/Verilog assertion checkers.
- PSL/Sugar
An industry-standard specification language, originally invented by IBM, which engineers use to specify functional properties and drive assertion-based verification tools. It is simple, concise, and expressive.
- Formal Verification on demand
IBM's new web portal provides access to select chip design services on an as-needed basis. Formal Verification, using RuleBase, is one of the first services to be made available under this offering, see case study
IBM presents RuleBase PE at the annual DAC conferences and other industry events
See this press release and this paper to review what was said about RuleBase PE at DAC'05.
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